Added support for Wb32fq95 (#16871)
This commit is contained in:
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@ -683,6 +683,40 @@ ifneq ($(findstring WB32F3G71, $(MCU)),)
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WB32_BOOTLOADER_ADDRESS ?= 0x1FFFE000
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endif
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ifneq ($(findstring WB32FQ95, $(MCU)),)
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# Cortex version
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MCU = cortex-m3
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# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
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ARMV = 7
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## chip/board settings
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# - the next two should match the directories in
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# <chibios[-contrib]>/os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES)
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# OR
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# <chibios[-contrib]>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
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MCU_FAMILY = WB32
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MCU_SERIES = WB32FQ95xx
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# Linker script to use
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# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
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# or <keyboard_dir>/ld/
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MCU_LDSCRIPT ?= WB32FQ95xB
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# Startup code to use
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# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
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MCU_STARTUP ?= wb32fq95xx
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# Board: it should exist either in <chibios>/os/hal/boards/,
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# <keyboard_dir>/boards/, or drivers/boards/
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BOARD ?= GENERIC_WB32_FQ95XX
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USE_FPU ?= no
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# Bootloader address for WB32 DFU
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WB32_BOOTLOADER_ADDRESS ?= 0x1FFFE000
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endif
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ifneq ($(findstring GD32VF103, $(MCU)),)
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# RISC-V
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MCU = risc-v
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@ -22,7 +22,7 @@
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},
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"processor": {
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"type": "string",
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"enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L432", "STM32L433", "STM32L442", "STM32L443", "GD32VF103", "WB32F3G71", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
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"enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L432", "STM32L433", "STM32L442", "STM32L443", "GD32VF103", "WB32F3G71", "WB32FQ95", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
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},
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"audio": {
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"type": "object",
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@ -51,6 +51,7 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
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### WestBerryTech (WB32)
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* [WB32F3G71xx](http://www.westberrytech.com)
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* [WB32FQ95xx](http://www.westberrytech.com)
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### NXP (Kinetis)
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@ -14,7 +14,7 @@ QMK_FIRMWARE_UPSTREAM = 'qmk/qmk_firmware'
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MAX_KEYBOARD_SUBFOLDERS = 5
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# Supported processor types
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CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F405', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L432', 'STM32L433', 'STM32L442', 'STM32L443', 'GD32VF103', 'WB32F3G71'
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CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F405', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L432', 'STM32L433', 'STM32L442', 'STM32L443', 'GD32VF103', 'WB32F3G71', 'WB32FQ95'
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LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None
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VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'
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@ -43,6 +43,7 @@ MCU2BOOTLOADER = {
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"STM32L443": "stm32-dfu",
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"GD32VF103": "gd32v-dfu",
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"WB32F3G71": "wb32-dfu",
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"WB32FQ95": "wb32-dfu",
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"atmega16u2": "atmel-dfu",
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"atmega32u2": "atmel-dfu",
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"atmega16u4": "atmel-dfu",
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@ -34,7 +34,10 @@
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/*
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* Board identifier.
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*/
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#if !(defined(WB32F3G71x9) || defined(WB32F3G71xB) || defined(WB32F3G71xC))
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#define WB32F3G71x9
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#endif
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#if !defined(WB32F3G71xx)
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#define WB32F3G71xx
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#endif
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@ -0,0 +1,82 @@
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/*
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Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#include "hal.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static void wb32_gpio_init(void) {
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#if WB32_HAS_GPIOA
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rccEnableAPB1(RCC_APB1ENR_GPIOAEN);
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#endif
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#if WB32_HAS_GPIOB
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rccEnableAPB1(RCC_APB1ENR_GPIOBEN);
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#endif
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#if WB32_HAS_GPIOC
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rccEnableAPB1(RCC_APB1ENR_GPIOCEN);
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#endif
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#if WB32_HAS_GPIOD
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rccEnableAPB1(RCC_APB1ENR_GPIODEN);
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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wb32_clock_init();
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wb32_gpio_init();
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}
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/**
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* @brief Board-specific initialization code.
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* @note You can add your board-specific code here.
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*/
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void boardInit(void) {
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}
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@ -0,0 +1,59 @@
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#pragma once
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/*
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Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup board.
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*/
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/*
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* Board identifier.
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*/
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#if !(defined(WB32FQ95x9) || defined(WB32FQ95xB) || defined(WB32FQ95xC))
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#define WB32FQ95xB
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#endif
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#if !defined(WB32FQ95xx)
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#define WB32FQ95xx
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#endif
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* BOARD_H */
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@ -0,0 +1,9 @@
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# List of all the board related files.
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BOARDSRC = $(BOARD_PATH)/board/board.c
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# Required include directories
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BOARDINC = $(BOARD_PATH)/board
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# Shared variables
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ALLCSRC += $(BOARDSRC)
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ALLINC += $(BOARDINC)
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@ -0,0 +1,26 @@
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/* Copyright 2020 QMK
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* This file was auto-generated by:
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* `qmk chibios-confmigrate -i platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/chconf.h -r platforms/chibios/boards/common/configs/chconf.h`
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*/
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#pragma once
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#define CH_CFG_ST_TIMEDELTA 0
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#include_next <chconf.h>
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@ -0,0 +1,20 @@
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/* Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#pragma once
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#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
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# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
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#endif
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@ -0,0 +1,168 @@
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/*
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Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef MCUCONF_H
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#define MCUCONF_H
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#define WB32FQ95xx_MCUCONF TRUE
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/*
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* WB32FQ95 drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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*/
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/**
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* @name Internal clock sources
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* @{
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*/
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#define WB32_HSECLK 12000000
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#define WB32_LSECLK 32768
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/*
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* HAL driver system settings.
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*/
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#define WB32_NO_INIT FALSE
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#define WB32_MHSI_ENABLED TRUE
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#define WB32_FHSI_ENABLED FALSE
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#define WB32_LSI_ENABLED FALSE
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#define WB32_HSE_ENABLED TRUE
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#define WB32_LSE_ENABLED FALSE
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#define WB32_PLL_ENABLED TRUE
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#define WB32_MAINCLKSRC WB32_MAINCLKSRC_PLL
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#define WB32_PLLSRC WB32_PLLSRC_HSE
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#define WB32_PLLDIV_VALUE 2
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#define WB32_PLLMUL_VALUE 12 //The allowed range is 12,16,20,24.
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#define WB32_HPRE 1
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#define WB32_PPRE1 1
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#define WB32_PPRE2 1
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#define WB32_USBPRE WB32_USBPRE_DIV1P5
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/*
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* EXTI driver system settings.
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*/
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#define WB32_IRQ_EXTI0_PRIORITY 6
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#define WB32_IRQ_EXTI1_PRIORITY 6
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#define WB32_IRQ_EXTI2_PRIORITY 6
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#define WB32_IRQ_EXTI3_PRIORITY 6
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#define WB32_IRQ_EXTI4_PRIORITY 6
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#define WB32_IRQ_EXTI5_9_PRIORITY 6
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#define WB32_IRQ_EXTI10_15_PRIORITY 6
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#define WB32_IRQ_EXTI16_PRIORITY 6
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#define WB32_IRQ_EXTI17_PRIORITY 6
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#define WB32_IRQ_EXTI18_PRIORITY 6
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#define WB32_IRQ_EXTI19_PRIORITY 6
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/*
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* GPT driver system settings.
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*/
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#define WB32_TIM_MAX_CHANNELS 4
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#define WB32_GPT_USE_TIM1 FALSE
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#define WB32_GPT_USE_TIM2 FALSE
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#define WB32_GPT_USE_TIM3 FALSE
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#define WB32_GPT_USE_TIM4 FALSE
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#define WB32_GPT_TIM1_IRQ_PRIORITY 7
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#define WB32_GPT_TIM2_IRQ_PRIORITY 7
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#define WB32_GPT_TIM3_IRQ_PRIORITY 7
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#define WB32_GPT_TIM4_IRQ_PRIORITY 7
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/*
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* ICU driver system settings.
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*/
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#define WB32_ICU_USE_TIM1 FALSE
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#define WB32_ICU_USE_TIM2 FALSE
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#define WB32_ICU_USE_TIM3 FALSE
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#define WB32_ICU_USE_TIM4 FALSE
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#define WB32_ICU_TIM1_IRQ_PRIORITY 7
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#define WB32_ICU_TIM2_IRQ_PRIORITY 7
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#define WB32_ICU_TIM3_IRQ_PRIORITY 7
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#define WB32_ICU_TIM4_IRQ_PRIORITY 7
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/*
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* PWM driver system settings.
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*/
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#define WB32_PWM_USE_ADVANCED FALSE
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#define WB32_PWM_USE_TIM1 FALSE
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#define WB32_PWM_USE_TIM2 FALSE
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#define WB32_PWM_USE_TIM3 FALSE
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#define WB32_PWM_USE_TIM4 FALSE
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#define WB32_PWM_TIM1_IRQ_PRIORITY 7
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#define WB32_PWM_TIM2_IRQ_PRIORITY 7
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#define WB32_PWM_TIM3_IRQ_PRIORITY 7
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#define WB32_PWM_TIM4_IRQ_PRIORITY 7
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/*
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* I2C driver system settings.
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*/
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#define WB32_I2C_USE_I2C1 FALSE
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#define WB32_I2C_USE_I2C2 FALSE
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#define WB32_I2C_BUSY_TIMEOUT 50
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#define WB32_I2C_I2C1_IRQ_PRIORITY 5
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#define WB32_I2C_I2C2_IRQ_PRIORITY 5
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/*
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* SERIAL driver system settings.
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*/
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#define WB32_SERIAL_USE_UART1 FALSE
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#define WB32_SERIAL_USE_UART2 FALSE
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#define WB32_SERIAL_USE_UART3 FALSE
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#define WB32_SERIAL_USART1_PRIORITY 12
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#define WB32_SERIAL_USART2_PRIORITY 12
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#define WB32_SERIAL_USART3_PRIORITY 12
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/*
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* SPI driver system settings.
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*/
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#define WB32_SPI_USE_QSPI FALSE
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#define WB32_SPI_USE_SPIM2 FALSE
|
||||
#define WB32_SPI_USE_SPIS1 FALSE
|
||||
#define WB32_SPI_USE_SPIS2 FALSE
|
||||
#define WB32_SPI_QSPI_IRQ_PRIORITY 10
|
||||
#define WB32_SPI_SPIM2_IRQ_PRIORITY 10
|
||||
#define WB32_SPI_SPIS1_IRQ_PRIORITY 10
|
||||
#define WB32_SPI_SPIS2_IRQ_PRIORITY 10
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define WB32_ST_IRQ_PRIORITY 8
|
||||
#define WB32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define WB32_UART_USE_UART1 FALSE
|
||||
#define WB32_UART_USE_UART2 FALSE
|
||||
#define WB32_UART_USE_UART3 FALSE
|
||||
#define WB32_UART_UART1_IRQ_PRIORITY 12
|
||||
#define WB32_UART_UART2_IRQ_PRIORITY 12
|
||||
#define WB32_UART_UART3_IRQ_PRIORITY 12
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define WB32_USB_USE_USB1 TRUE
|
||||
#define WB32_USB_USB1_IRQ_PRIORITY 13
|
||||
#define WB32_USB_HOST_WAKEUP_DURATION 10
|
||||
|
||||
|
||||
#endif /* MCUCONF_H */
|
|
@ -55,7 +55,7 @@
|
|||
#if defined(MCU_WB32)
|
||||
# define CPU_CLOCK WB32_MAINCLK
|
||||
|
||||
# if defined(WB32F3G71xx)
|
||||
# if defined(WB32F3G71xx) || defined(WB32FQ95xx)
|
||||
# define PAL_OUTPUT_TYPE_OPENDRAIN PAL_WB32_OTYPE_OPENDRAIN
|
||||
# define PAL_OUTPUT_TYPE_PUSHPULL PAL_WB32_OTYPE_PUSHPULL
|
||||
# define PAL_OUTPUT_SPEED_HIGHEST PAL_WB32_OSPEED_HIGH
|
||||
|
|
|
@ -97,7 +97,7 @@ static const I2CConfig i2cconfig = {
|
|||
I2C1_OPMODE,
|
||||
I2C1_CLOCK_SPEED,
|
||||
I2C1_DUTY_CYCLE,
|
||||
#elif defined(WB32F3G71xx)
|
||||
#elif defined(WB32F3G71xx) || defined(WB32FQ95xx)
|
||||
I2C1_OPMODE,
|
||||
I2C1_CLOCK_SPEED,
|
||||
#else
|
||||
|
|
|
@ -54,7 +54,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
|
|||
return false;
|
||||
}
|
||||
|
||||
#ifndef WB32F3G71xx
|
||||
#if !(defined(WB32F3G71xx) || defined(WB32FQ95xx))
|
||||
uint16_t roundedDivisor = 2;
|
||||
while (roundedDivisor < divisor) {
|
||||
roundedDivisor <<= 1;
|
||||
|
@ -138,7 +138,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
|
|||
|
||||
spiConfig.cpr = (roundedDivisor - 1) >> 1;
|
||||
|
||||
#elif defined(WB32F3G71xx)
|
||||
#elif defined(WB32F3G71xx) || defined(WB32FQ95xx)
|
||||
if (!lsbFirst) {
|
||||
osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst");
|
||||
}
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
|
||||
#include "quantum.h"
|
||||
|
||||
#if defined(WB32F3G71xx)
|
||||
#if defined(WB32F3G71xx) || defined(WB32FQ95xx)
|
||||
static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT};
|
||||
#else
|
||||
static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3};
|
||||
|
|
Loading…
Reference in New Issue