Remove tmk_core 'serial' code (#17866)
This commit is contained in:
Joel Challis
GitHub
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972f9a612c
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/*
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Copyright 2012 Jun WAKO <wakojun@gmail.com>
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This software is licensed with a Modified BSD License.
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All of this is supposed to be Free Software, Open Source, DFSG-free,
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GPL-compatible, and OK to use in both free and proprietary applications.
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Additions and corrections to this file are welcome.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdbool.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/delay.h>
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#include "serial.h"
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/*
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* Stupid Inefficient Busy-wait Software Serial
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* which is still useful for negative logic signal like Sun protocol
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* if it is not supported by hardware UART.
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*
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* TODO: delay is not accurate enough. Instruction cycle should be counted and inline assemby is needed.
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*/
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#define WAIT_US (1000000L / SERIAL_SOFT_BAUD)
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#ifdef SERIAL_SOFT_LOGIC_NEGATIVE
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# define SERIAL_SOFT_RXD_IN() !(SERIAL_SOFT_RXD_READ())
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# define SERIAL_SOFT_TXD_ON() SERIAL_SOFT_TXD_LO()
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# define SERIAL_SOFT_TXD_OFF() SERIAL_SOFT_TXD_HI()
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#else
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# define SERIAL_SOFT_RXD_IN() !!(SERIAL_SOFT_RXD_READ())
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# define SERIAL_SOFT_TXD_ON() SERIAL_SOFT_TXD_HI()
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# define SERIAL_SOFT_TXD_OFF() SERIAL_SOFT_TXD_LO()
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#endif
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#ifdef SERIAL_SOFT_PARITY_EVEN
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# define SERIAL_SOFT_PARITY_VAL 0
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#elif defined(SERIAL_SOFT_PARITY_ODD)
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# define SERIAL_SOFT_PARITY_VAL 1
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#endif
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/* debug for signal timing, see debug pin with oscilloscope */
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#ifdef SERIAL_SOFT_DEBUG
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# define SERIAL_SOFT_DEBUG_INIT() (DDRD |= 1 << 7)
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# define SERIAL_SOFT_DEBUG_TGL() (PORTD ^= 1 << 7)
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#else
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# define SERIAL_SOFT_DEBUG_INIT()
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# define SERIAL_SOFT_DEBUG_TGL()
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#endif
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void serial_init(void) {
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SERIAL_SOFT_DEBUG_INIT();
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SERIAL_SOFT_RXD_INIT();
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SERIAL_SOFT_TXD_INIT();
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}
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/* RX ring buffer */
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#define RBUF_SIZE 8
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static uint8_t rbuf[RBUF_SIZE];
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static uint8_t rbuf_head = 0;
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static uint8_t rbuf_tail = 0;
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uint8_t serial_recv(void) {
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uint8_t data = 0;
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if (rbuf_head == rbuf_tail) {
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return 0;
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}
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data = rbuf[rbuf_tail];
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rbuf_tail = (rbuf_tail + 1) % RBUF_SIZE;
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return data;
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}
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int16_t serial_recv2(void) {
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uint8_t data = 0;
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if (rbuf_head == rbuf_tail) {
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return -1;
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}
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data = rbuf[rbuf_tail];
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rbuf_tail = (rbuf_tail + 1) % RBUF_SIZE;
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return data;
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}
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void serial_send(uint8_t data) {
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/* signal state: IDLE: ON, START: OFF, STOP: ON, DATA0: OFF, DATA1: ON */
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#ifdef SERIAL_SOFT_BIT_ORDER_MSB
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# ifdef SERIAL_SOFT_DATA_7BIT
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uint8_t mask = 0x40;
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# else
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uint8_t mask = 0x80;
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# endif
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#else
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uint8_t mask = 0x01;
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#endif
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uint8_t parity = 0;
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/* start bit */
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SERIAL_SOFT_TXD_OFF();
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_delay_us(WAIT_US);
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#ifdef SERIAL_SOFT_DATA_7BIT
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while (mask & 0x7F) {
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#else
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while (mask & 0xFF) {
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#endif
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if (data & mask) {
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SERIAL_SOFT_TXD_ON();
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parity ^= 1;
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} else {
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SERIAL_SOFT_TXD_OFF();
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}
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_delay_us(WAIT_US);
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#ifdef SERIAL_SOFT_BIT_ORDER_MSB
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mask >>= 1;
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#else
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mask <<= 1;
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#endif
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}
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#if defined(SERIAL_SOFT_PARITY_EVEN) || defined(SERIAL_SOFT_PARITY_ODD)
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/* to center of parity bit */
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if (parity != SERIAL_SOFT_PARITY_VAL) {
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SERIAL_SOFT_TXD_ON();
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} else {
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SERIAL_SOFT_TXD_OFF();
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}
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_delay_us(WAIT_US);
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#endif
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/* stop bit */
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SERIAL_SOFT_TXD_ON();
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_delay_us(WAIT_US);
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}
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/* detect edge of start bit */
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ISR(SERIAL_SOFT_RXD_VECT) {
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SERIAL_SOFT_DEBUG_TGL();
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SERIAL_SOFT_RXD_INT_ENTER();
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uint8_t data = 0;
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#ifdef SERIAL_SOFT_BIT_ORDER_MSB
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# ifdef SERIAL_SOFT_DATA_7BIT
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uint8_t mask = 0x40;
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# else
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uint8_t mask = 0x80;
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# endif
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#else
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uint8_t mask = 0x01;
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#endif
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uint8_t parity = 0;
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/* to center of start bit */
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_delay_us(WAIT_US / 2);
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SERIAL_SOFT_DEBUG_TGL();
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do {
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/* to center of next bit */
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_delay_us(WAIT_US);
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SERIAL_SOFT_DEBUG_TGL();
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if (SERIAL_SOFT_RXD_IN()) {
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data |= mask;
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parity ^= 1;
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}
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#ifdef SERIAL_SOFT_BIT_ORDER_MSB
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mask >>= 1;
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#else
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mask <<= 1;
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#endif
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#ifdef SERIAL_SOFT_DATA_7BIT
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} while (mask & 0x7F);
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#else
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} while (mask & 0xFF);
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#endif
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#if defined(SERIAL_SOFT_PARITY_EVEN) || defined(SERIAL_SOFT_PARITY_ODD)
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/* to center of parity bit */
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_delay_us(WAIT_US);
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if (SERIAL_SOFT_RXD_IN()) {
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parity ^= 1;
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}
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SERIAL_SOFT_DEBUG_TGL();
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#endif
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/* to center of stop bit */
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_delay_us(WAIT_US);
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uint8_t next = (rbuf_head + 1) % RBUF_SIZE;
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#if defined(SERIAL_SOFT_PARITY_EVEN) || defined(SERIAL_SOFT_PARITY_ODD)
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if ((parity == SERIAL_SOFT_PARITY_VAL) && next != rbuf_tail) {
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#else
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if (next != rbuf_tail) {
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#endif
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rbuf[rbuf_head] = data;
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rbuf_head = next;
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}
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SERIAL_SOFT_RXD_INT_EXIT();
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SERIAL_SOFT_DEBUG_TGL();
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}
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